Design Services Flow

ASIC Design Flow 

ChipX is an ASIC company with expertise in back-end physical design and analog development.  For digital or mixed-signal designs, ChipX will take a RTL, gate-level Netlist or FPGA Netlist and process it to GDSII before building masks and prototypes.  The following industry standard flow is used for all digital and mixed-signal ASIC designs, including standard cell, hybrid and Structured ASICs.  The flow leverages industry standard EDA tools from Cadence, Magma, Mentor, Synopsys and others. 

  Turnkey Design Flow

For Analog designs, ChipX will accept a customer specifications document and develop the entire chip.  The design flow, which also leverages industry standard EDA tools, is shown above. 

For digital front-end design services, ChipX has partnered with highly competent design houses that develop digital IP and complete processor subsystems and busses.  ChipX will assess your requirements and recommend the best design company for the job.