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This document gives an example of how mixed-signal ASIC technology can be used to
implement complex system level designs with fast turnaround times and reduced
engineering effort.
A brief outline of the design requirements and application is given, followed by a
description of how technology and design capabilities were able to successfully satisfy
these requirements.
The mixed-signal ASIC family used in this example is based on a cell-based
architecture, implemented in UMC’s 0.13-micron HS process. This family’s features
include metal programmable I/O, configurable embedded RAM and APLLs, as well as
an embedded USB 2.0 HS On-the-Go (OTG) PHY.
Design Objective
The design objective of the mixed-signal ASIC was to facilitate the seamless
connection of multiple PC displays of different resolutions and types via USB to a host
computer running Windows. The customer uses the new mixed-signal ASIC, in
conjunction with a virtual Graphics Card implemented in software, to process a pixel
stream into a proprietary graphics transport format, and to then transmit that data over
a High Speed USB 2.0 link for display on a standard screen.
Applications include cloning or extending a desktop onto one or more additional
displays. These additional screens can either display the same information as the main
screen, or show completely different applications. The mixed-signal chip can also be
used as part of a USB video hub or part of a USB laptop docking station. This device
was successfully demonstrated by the customer at a major consumer electronics show
in 2007, and is now in volume production.
In order for multiple displays to operate without perceptible degradation in
performance, the mixed-signal ASIC required a fully compliant USB 2.0 high-speed
interface, with a USB device controller and a small 8-bit host processor. An additional
requirement for imperceptible latency drove the need for a DDR (Double Data Rate)
SDRAM memory interface for frame buffering.
There are a wide variety of video data speeds needed to communicate with screens of
different resolution and refresh rates, so there was a need for a flexible clocking
scheme allowing different frequencies to be generated and adjusted in order to avoid
restricting the application of the device. Different I/O standards were also required, to
0347-6K-090-B 3 of 8 Nov. 30, 2007 allow communication of video data to different types of displays.
In addition to the technical requirements of the mixed-signal ASIC itself, the customer
did not have a full set of ASIC development tools available during the project. The
ASIC vendor was required to demonstrate a flexible approach to the design flow and
breakdown of design work to reduce both engineering time and capital outlay for
design tools.
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