Products Intellectual Property Overview High-Speed Interface
High-Speed Interface |
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ChipX provides a fully features USB 2.0 HS OTG controller
for use in systems that have to behave as both Host and Device. Such systems
include those that have to connect to a Peripheral, like a printer, but also to
a Host (like a PC). The USB HS OTG controller offers an efficient architecture,
flexible number of end points, as well as full support for Full Speed (FS) mode.
The fully synthesizable HS OTG controller is enabled to work with Hubs,
extending the theoretical network size to 128 nodes. The USB HS OTG controller
has been proven in millions of shipped products, and has passed USB Implementers
Forum (USB-IF) USB 2.0 compliance testing in combination with the ChipX USB 2.0
PHY.
USB Hi-Speed Device (HS DEV)
controller
The USB HS Device controller is capable of supporting data
rates of 480Mbps ('USB 2.0'), as well as the older standard speeds of 12Mbps
('USB 1.1') and 1Mbps ('USB 1.0'). The fully synthesizable USB HS Device
controller is delivered as RTL, and uses a compact architecture to achieve low
gate counts, full performance, and offers flexible end-points to implement the
minimum required memory size. This product has been shipped in millions of
products, and has passed USB IF compliance testing for USB 2.0.
PCIe PHY
PCI Express controller cores are available as Soft IP from ChipX for inclusion in your design. The PCI Express controller core supports 1, 4, or 8 lanes and implements all protocol layers (Physical, Data Link and Transaction). The core supports root port, bridge or endpoint and interfaces to the PHY using the Intel PIPE interface. The controller core is delivered with simulation models, testbench, synthesis models, as well as a customization wizard and software drives. This product has passed PCI-SIG certification.
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The USB 2.0 compliant HS OTG PHY, in combination with ChipX validated, synthesizable processors and USB Host, Device, and OTG controllers, form a complete, interoperability-proven, USB subsystem capable of achieving USB-IF compliance. You can also use your own USB controller, and processor of choice where desired. The USB subsystem on the CX6200 family of products removes the complexity and risk of IP selection and IP interoperability testing, enabling faster time to market.
The PCI Express PHY, in combination with the ChipX synthesizable processors and PCI Express endpoint, root port, or bridge controllers, form a complete PCI Express subsystem capable of achieving PCI-SIG compliance. You can also use your own PCI Express controller where desired. The PCI Express subsystem on the CX6100 family of products removes complexity and the risk of IP selection and IP interoperability testing.