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About Embedded Array embedded
About Embedded Array Print Page

ChipX Embedded Arrays are a category of custom devices that combine the performance of today's Standard Cell ASIC memories, IO, analog building blocks with metal configurable logic, dramatically simplifying the design complexity and project risk. Embedded Arrays offer designers a set of devices with specific, customizable metal layers along with predefined metal layers, which can contain the underlying pattern of logic cells. By virtue of the predefined logic structures, the ASIC vendor can design any time-consuming task – such as test, signal integrity and IR drop – into the architecture. A key benefit to customers is the ability to change the entire logic on the device at a later stage using standard layout tools, by simply making metal layer changes.

Embedded Arrays remove the complexity of custom silicon design by providing a fabric of identical building block logic cells that are combined with customer specific memory and IO structures. Using only industry standard design automation tools the logic portion of the design is placed on the X-Cell logic fabric. Only the top layers need to be customized, allowing the design to benefit from faster turnaround time. By choosing 2, 3, or 4 customizable metal layers, the designer is in complete control of the trade-off between density, cycle time, and mask complexity.

Unlike Gate Arrays, Embedded Arrays offer integration of mixed signal and analog IP, as well as a large variety of memory structures.

Unlike Standard Cell, Embedded Arrays allow for faster time to market by starting production before all logic is defined by the customer. Embedded Arrays also allow for rapid, fully automated logic design changes using only a few masks. Embedded Arrays reuse most of their tested design elements, giving higher confidence in design success and time to market.

For the ultimate in low cost high volume production, embedded arrays can be converted to full Standard Cell. In most cases however, Embedded Arrays prove to be so efficient that Standard Cell conversion does not deliver significant improvements in cost or performance.