About ChipX Partners EDA Tools Partners EDA Tools Partners |
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 ChipX provides design kits for Cadence which support full timing Verilog simulation and fault simulation.
 As
part of the Synopsys "Semiconductor Vendor Partner Program," ChipX
provides design kits for Synopsys that support synthesis, simulation,
static timing analysis and test compiler.
 ChipX
uses SynTest's DFT (Design-for-Test) tools TurboBSD for boundary-scan
synthesis, TurboCheck-Gate for DFT rule checking at the gate-level, and
TurboScan for scan-synthesis and ATPG (Automatic Test Pattern
Generation).
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ChipX and Aldec work together to provide solutions to today's most complex design issues. Aldec also supplies ChipX FAE's with simulation software for on-site projects and troubleshooting. 
Magma
Design Automation develops software for electronic design automation
(EDA), enabling integrated circuit designers to meet critical
time-to-market objectives, improve chip performance and handle
multimillion-gate designs. With headquarters in Silicon Valley and a
global network of sales & support personnel, Magma customers
include leading semiconductor companies around the world. 
ChipX and Mentor Graphics work together to help design engineers overcome the validation challenge. 
ChipX
employs SpyGlass at the very start of the design cycle during incoming
inspection of Verilog and VHDL RTL. The ChipX engineering team uses
SpyGlass to analyze RTL for clock domain crossings, synchronization
styles, set/reset consistencies, combinational loops, potential timing
errors, DFT requirements and much more. This ensures the fastest
time-to-silicon and highest QoR. | < Prev | Next > |
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